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power.h
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1 /* Copyright (c) 2006, 2007, 2008 Eric B. Weddington
2  All rights reserved.
3 
4  Redistribution and use in source and binary forms, with or without
5  modification, are permitted provided that the following conditions are met:
6 
7  * Redistributions of source code must retain the above copyright
8  notice, this list of conditions and the following disclaimer.
9  * Redistributions in binary form must reproduce the above copyright
10  notice, this list of conditions and the following disclaimer in
11  the documentation and/or other materials provided with the
12  distribution.
13  * Neither the name of the copyright holders nor the names of
14  contributors may be used to endorse or promote products derived
15  from this software without specific prior written permission.
16 
17  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
18  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
21  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27  POSSIBILITY OF SUCH DAMAGE. */
28 
29 /* $Id: power.h 2254 2011-09-26 15:06:50Z arcanum $ */
30 
31 #ifndef _AVR_POWER_H_
32 #define _AVR_POWER_H_ 1
33 
34 #include <avr/io.h>
35 #include <stdint.h>
36 
37 
38 /** \file */
39 /** \defgroup avr_power <avr/power.h>: Power Reduction Management
40 
41 \code #include <avr/power.h>\endcode
42 
43 Many AVRs contain a Power Reduction Register (PRR) or Registers (PRRx) that
44 allow you to reduce power consumption by disabling or enabling various on-board
45 peripherals as needed.
46 
47 There are many macros in this header file that provide an easy interface
48 to enable or disable on-board peripherals to reduce power. See the table below.
49 
50 \note Not all AVR devices have a Power Reduction Register (for example
51 the ATmega128). On those devices without a Power Reduction Register, these
52 macros are not available.
53 
54 \note Not all AVR devices contain the same peripherals (for example, the LCD
55 interface), or they will be named differently (for example, USART and
56 USART0). Please consult your device's datasheet, or the header file, to
57 find out which macros are applicable to your device.
58 
59 */
60 
61 
62 /** \addtogroup avr_power
63 
64 \anchor avr_powermacros
65 <small>
66 <center>
67 <table border="3">
68  <tr>
69  <td width="10%"><strong>Power Macro</strong></td>
70  <td width="15%"><strong>Description</strong></td>
71  <td width="75%"><strong>Applicable for device</strong></td>
72  </tr>
73 
74  <tr>
75  <td>power_adc_enable()</td>
76  <td>Enable the Analog to Digital Converter module.</td>
77  <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, AT90PWM81, ATmega165, ATmega165P, ATmega325, ATmega325A, ATmega3250, ATmega3250A, ATmega645, ATmega6450, ATmega169, ATmega169P, ATmega329, ATmega329A, ATmega3290, ATmega3290A, ATmega649, ATmega6490, ATmega164P, ATmega324P, ATmega644, ATmega48, ATmega88, ATmega168, ATtiny24, ATtiny44, ATtiny84, ATtiny84A, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny461, ATtiny861, ATmega256RFR2, ATmega2564RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega64RFR2, ATmega644RFR2</td>
78  </tr>
79 
80  <tr>
81  <td>power_adc_disable()</td>
82  <td>Disable the Analog to Digital Converter module.</td>
83  <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, AT90PWM81, ATmega165, ATmega165P, ATmega325, ATmega325A, ATmega3250, ATmega3250A, ATmega645, ATmega6450, ATmega169, ATmega169P, ATmega329, ATmega329A, ATmega3290, ATmega3290A, ATmega649, ATmega6490, ATmega164P, ATmega324P, ATmega644, ATmega48, ATmega88, ATmega168, ATtiny24, ATtiny44, ATtiny84, ATtiny84A, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny461, ATtiny861, ATmega256RFR2, ATmega2564RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega64RFR2, ATmega644RFR2</td>
84  </tr>
85 
86  <tr>
87  <td>power_lcd_enable()</td>
88  <td>Enable the LCD module.</td>
89  <td>ATmega169, ATmega169P, ATmega329, ATmega329A, ATmega3290, ATmega3290A, ATmega649, ATmega6490</td>
90  </tr>
91 
92  <tr>
93  <td>power_lcd_disable().</td>
94  <td>Disable the LCD module.</td>
95  <td>ATmega169, ATmega169P, ATmega329, ATmega329A, ATmega3290, ATmega3290A, ATmega649, ATmega6490</td>
96  </tr>
97 
98  <tr>
99  <td>power_pga_enable()</td>
100  <td>Enable the Programmable Gain Amplifier module.</td>
101  <td> ATmega256RFR2, ATmega2564RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega64RFR2, ATmega644RFR2</td>
102  </tr>
103 
104  <tr>
105  <td>power_pga_disable()</td>
106  <td>Disable the Programmable Gain Amplifier module.</td>
107  <td> ATmega256RFR2, ATmega2564RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega64RFR2, ATmega644RFR2</td>
108  </tr>
109 
110  <tr>
111  <td>power_pscr_enable()</td>
112  <td>Enable the Reduced Power Stage Controller module.</td>
113  <td>AT90PWM81</td>
114  </tr>
115 
116  <tr>
117  <td>power_pscr_disable()</td>
118  <td>Disable the Reduced Power Stage Controller module.</td>
119  <td>AT90PWM81</td>
120  </tr>
121 
122  <tr>
123  <td>power_psc0_enable()</td>
124  <td>Enable the Power Stage Controller 0 module.</td>
125  <td>AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B</td>
126  </tr>
127 
128  <tr>
129  <td>power_psc0_disable()</td>
130  <td>Disable the Power Stage Controller 0 module.</td>
131  <td>AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B</td>
132  </tr>
133 
134  <tr>
135  <td>power_psc1_enable()</td>
136  <td>Enable the Power Stage Controller 1 module.</td>
137  <td>AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B</td>
138  </tr>
139 
140  <tr>
141  <td>power_psc1_disable()</td>
142  <td>Disable the Power Stage Controller 1 module.</td>
143  <td>AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B</td>
144  </tr>
145 
146  <tr>
147  <td>power_psc2_enable()</td>
148  <td>Enable the Power Stage Controller 2 module.</td>
149  <td>AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM81</td>
150  </tr>
151 
152  <tr>
153  <td>power_psc2_disable()</td>
154  <td>Disable the Power Stage Controller 2 module.</td>
155  <td>AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM81</td>
156  </tr>
157 
158  <tr>
159  <td>power_ram0_enable()</td>
160  <td>Enable the SRAM block 0 .</td>
161  <td> ATmega256RFR2, ATmega2564RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega64RFR2, ATmega644RFR2</td>
162  </tr>
163 
164  <tr>
165  <td>power_ram0_disable()</td>
166  <td>Disable the SRAM block 0. </td>
167  <td> ATmega256RFR2, ATmega2564RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega64RFR2, ATmega644RFR2</td>
168  </tr>
169 
170  <tr>
171  <td>power_ram1_enable()</td>
172  <td>Enable the SRAM block 1 .</td>
173  <td> ATmega256RFR2, ATmega2564RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega64RFR2, ATmega644RFR2</td>
174  </tr>
175 
176  <tr>
177  <td>power_ram1_disable()</td>
178  <td>Disable the SRAM block 1. </td>
179  <td> ATmega256RFR2, ATmega2564RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega64RFR2, ATmega644RFR2</td>
180  </tr>
181 
182  <tr>
183  <td>power_ram2_enable()</td>
184  <td>Enable the SRAM block 2 .</td>
185  <td> ATmega256RFR2, ATmega2564RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega64RFR2, ATmega644RFR2</td>
186  </tr>
187 
188  <tr>
189  <td>power_ram2_disable()</td>
190  <td>Disable the SRAM block 2. </td>
191  <td> ATmega256RFR2, ATmega2564RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega64RFR2, ATmega644RFR2</td>
192  </tr>
193 
194  <tr>
195  <td>power_ram3_enable()</td>
196  <td>Enable the SRAM block 3 .</td>
197  <td> ATmega256RFR2, ATmega2564RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega64RFR2, ATmega644RFR2</td>
198  </tr>
199 
200  <tr>
201  <td>power_ram3_disable()</td>
202  <td>Disable the SRAM block 3. </td>
203  <td> ATmega256RFR2, ATmega2564RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega64RFR2, ATmega644RFR2</td>
204  </tr>
205 
206  <tr>
207  <td>power_spi_enable()</td>
208  <td>Enable the Serial Peripheral Interface module.</td>
209  <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, AT90PWM81, ATmega165, ATmega165P, ATmega325, ATmega325A, ATmega3250, ATmega3250A, ATmega645, ATmega6450, ATmega169, ATmega169P, ATmega329, ATmega329A, ATmega3290, ATmega3290A, ATmega649, ATmega6490, ATmega164P, ATmega324P, ATmega644, ATmega48, ATmega88, ATmega168, ATmega256RFR2, ATmega2564RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega64RFR2, ATmega644RFR2</td>
210  </tr>
211 
212  <tr>
213  <td>power_spi_disable()</td>
214  <td>Disable the Serial Peripheral Interface module.</td>
215  <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, AT90PWM81, ATmega165, ATmega165P, ATmega325, ATmega325A, ATmega3250, ATmega3250A, ATmega645, ATmega6450, ATmega169, ATmega169P, ATmega329, ATmega329A, ATmega3290, ATmega3290A, ATmega649, ATmega6490, ATmega164P, ATmega324P, ATmega644, ATmega48, ATmega88, ATmega168, ATmega256RFR2, ATmega2564RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega64RFR2, ATmega644RFR2</td>
216  </tr>
217 
218  <tr>
219  <td>power_timer0_enable()</td>
220  <td>Enable the Timer 0 module.</td>
221  <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, AT90PWM1, AT90PWM216, AT90PWM316, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, ATmega165, ATmega165P, ATmega325, ATmega325A, ATmega3250, ATmega3250A, ATmega645, ATmega6450, ATmega164P, ATmega324P, ATmega644, ATmega406, ATmega48, ATmega88, ATmega168, ATtiny24, ATtiny44, ATtiny84, ATtiny84A, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny461, ATtiny861, ATmega256RFR2, ATmega2564RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega64RFR2, ATmega644RFR2</td>
222  </tr>
223 
224  <tr>
225  <td>power_timer0_disable()</td>
226  <td>Disable the Timer 0 module.</td>
227  <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, ATmega165, ATmega165P, ATmega325, ATmega325A, ATmega3250, ATmega3250A, ATmega645, ATmega6450, ATmega164P, ATmega324P, ATmega644, ATmega406, ATmega48, ATmega88, ATmega168, ATtiny24, ATtiny44, ATtiny84, ATtiny84A, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny461, ATtiny861, ATmega256RFR2, ATmega2564RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega64RFR2, ATmega644RFR2</td>
228  </tr>
229 
230  <tr>
231  <td>power_timer1_enable()</td>
232  <td>Enable the Timer 1 module.</td>
233  <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, AT90PWM81, ATmega165, ATmega165P, ATmega325, ATmega325A, ATmega3250, ATmega3250A, ATmega645, ATmega6450, ATmega169, ATmega169P, ATmega329, ATmega329A, ATmega3290, ATmega3290A, ATmega649, ATmega6490, ATmega164P, ATmega324P, ATmega644, ATmega406, ATmega48, ATmega88, ATmega168, ATtiny24, ATtiny44, ATtiny84, ATtiny84A, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny461, ATtiny861, ATmega256RFR2, ATmega2564RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega64RFR2, ATmega644RFR2</td>
234  </tr>
235 
236  <tr>
237  <td>power_timer1_disable()</td>
238  <td>Disable the Timer 1 module.</td>
239  <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, AT90PWM81, ATmega165, ATmega165P, ATmega325, ATmega325A, ATmega3250, ATmega3250A, ATmega645, ATmega6450, ATmega169, ATmega169P, ATmega329, ATmega329A, ATmega3290, ATmega3290A, ATmega649, ATmega6490, ATmega164P, ATmega324P, ATmega644, ATmega406, ATmega48, ATmega88, ATmega168, ATtiny24, ATtiny44, ATtiny84, ATtiny84A, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny461, ATtiny861, ATmega256RFR2, ATmega2564RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega64RFR2, ATmega644RFR2</td>
240  </tr>
241 
242  <tr>
243  <td>power_timer2_enable()</td>
244  <td>Enable the Timer 2 module.</td>
245  <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega164P, ATmega324P, ATmega644, ATmega48, ATmega88, ATmega168, ATmega256RFR2, ATmega2564RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega64RFR2, ATmega644RFR2</td>
246  </tr>
247 
248  <tr>
249  <td>power_timer2_disable()</td>
250  <td>Disable the Timer 2 module.</td>
251  <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega164P, ATmega324P, ATmega644, ATmega48, ATmega88, ATmega168, ATmega256RFR2, ATmega2564RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega64RFR2, ATmega644RFR2</td>
252  </tr>
253 
254  <tr>
255  <td>power_timer3_enable()</td>
256  <td>Enable the Timer 3 module.</td>
257  <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega256RFR2, ATmega2564RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega64RFR2, ATmega644RFR2</td>
258  </tr>
259 
260  <tr>
261  <td>power_timer3_disable()</td>
262  <td>Disable the Timer 3 module.</td>
263  <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega256RFR2, ATmega2564RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega64RFR2, ATmega644RFR2</td>
264  </tr>
265 
266  <tr>
267  <td>power_timer4_enable()</td>
268  <td>Enable the Timer 4 module.</td>
269  <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, ATmega256RFR2, ATmega2564RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega64RFR2, ATmega644RFR2</td>
270  </tr>
271 
272  <tr>
273  <td>power_timer4_disable()</td>
274  <td>Disable the Timer 4 module.</td>
275  <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, ATmega256RFR2, ATmega2564RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega64RFR2, ATmega644RFR2</td>
276  </tr>
277 
278  <tr>
279  <td>power_timer5_enable()</td>
280  <td>Enable the Timer 5 module.</td>
281  <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, ATmega256RFR2, ATmega2564RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega64RFR2, ATmega644RFR2</td>
282  </tr>
283 
284  <tr>
285  <td>power_timer5_disable()</td>
286  <td>Disable the Timer 5 module.</td>
287  <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, ATmega256RFR2, ATmega2564RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega64RFR2, ATmega644RFR2</td>
288  </tr>
289 
290  <tr>
291  <td>power_twi_enable()</td>
292  <td>Enable the Two Wire Interface module.</td>
293  <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega164P, ATmega324P, ATmega644, ATmega406, ATmega48, ATmega88, ATmega168, ATmega256RFR2, ATmega2564RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega64RFR2, ATmega644RFR2</td>
294  </tr>
295 
296  <tr>
297  <td>power_twi_disable()</td>
298  <td>Disable the Two Wire Interface module.</td>
299  <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega164P, ATmega324P, ATmega644, ATmega406, ATmega48, ATmega88, ATmega168, ATmega256RFR2, ATmega2564RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega64RFR2, ATmega644RFR2</td>
300  </tr>
301 
302  <tr>
303  <td>power_usart_enable()</td>
304  <td>Enable the USART module.</td>
305  <td>AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B</td>
306  </tr>
307 
308  <tr>
309  <td>power_usart_disable()</td>
310  <td>Disable the USART module.</td>
311  <td>AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B</td>
312  </tr>
313 
314  <tr>
315  <td>power_usart0_enable()</td>
316  <td>Enable the USART 0 module.</td>
317  <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, ATmega165, ATmega165P, ATmega325, ATmega325A, ATmega3250, ATmega3250A, ATmega645, ATmega6450, ATmega169, ATmega169P, ATmega329, ATmega329A, ATmega3290, ATmega3290A, ATmega649, ATmega6490, ATmega164P, ATmega324P, ATmega644, ATmega48, ATmega88, ATmega168, ATmega256RFR2, ATmega2564RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega64RFR2, ATmega644RFR2</td>
318  </tr>
319 
320  <tr>
321  <td>power_usart0_disable()</td>
322  <td>Disable the USART 0 module.</td>
323  <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, ATmega165, ATmega165P, ATmega325, ATmega325A, ATmega3250, ATmega3250A, ATmega645, ATmega6450, ATmega169, ATmega169P, ATmega329, ATmega329A, ATmega3290, ATmega3290A, ATmega649, ATmega6490, ATmega164P, ATmega324P, ATmega644, ATmega48, ATmega88, ATmega168, ATmega256RFR2, ATmega2564RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega64RFR2, ATmega644RFR2</td>
324  </tr>
325 
326  <tr>
327  <td>power_usart1_enable()</td>
328  <td>Enable the USART 1 module.</td>
329  <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega164P, ATmega324P, ATmega644, ATmega256RFR2, ATmega2564RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega64RFR2, ATmega644RFR2</td>
330  </tr>
331 
332  <tr>
333  <td>power_usart1_disable()</td>
334  <td>Disable the USART 1 module.</td>
335  <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega164P, ATmega324P, ATmega644, ATmega256RFR2, ATmega2564RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega64RFR2, ATmega644RFR2</td>
336  </tr>
337 
338  <tr>
339  <td>power_usart2_enable()</td>
340  <td>Enable the USART 2 module.</td>
341  <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561</td>
342  </tr>
343 
344  <tr>
345  <td>power_usart2_disable()</td>
346  <td>Disable the USART 2 module.</td>
347  <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561</td>
348  </tr>
349 
350  <tr>
351  <td>power_usart3_enable()</td>
352  <td>Enable the USART 3 module.</td>
353  <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561</td>
354  </tr>
355 
356  <tr>
357  <td>power_usart3_disable()</td>
358  <td>Disable the USART 3 module.</td>
359  <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561</td>
360  </tr>
361 
362  <tr>
363  <td>power_usb_enable()</td>
364  <td>Enable the USB module.</td>
365  <td>AT90USB646, AT90USB647, AT90USB1286, AT90USB1287</td>
366  </tr>
367 
368  <tr>
369  <td>power_usb_disable()</td>
370  <td>Disable the USB module.</td>
371  <td>AT90USB646, AT90USB647, AT90USB1286, AT90USB1287</td>
372  </tr>
373 
374  <tr>
375  <td>power_usi_enable()</td>
376  <td>Enable the Universal Serial Interface module.</td>
377  <td>ATtiny24, ATtiny44, ATtiny84, ATtiny84A, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny461, ATtiny861</td>
378  </tr>
379 
380  <tr>
381  <td>power_usi_disable()</td>
382  <td>Disable the Universal Serial Interface module.</td>
383  <td>ATtiny24, ATtiny44, ATtiny84, ATtiny84A, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny461, ATtiny861</td>
384  </tr>
385 
386  <tr>
387  <td>power_vadc_enable()</td>
388  <td>Enable the Voltage ADC module.</td>
389  <td>ATmega406</td>
390  </tr>
391 
392  <tr>
393  <td>power_vadc_disable()</td>
394  <td>Disable the Voltage ADC module.</td>
395  <td>ATmega406</td>
396  </tr>
397 
398  <tr>
399  <td>power_all_enable()</td>
400  <td>Enable all modules.</td>
401  <td>ATxmega6A4, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmegaA1, ATxmegaA1U, ATxmega128A3, ATxmega192A3, ATxmega256A3, ATxmegaA3B, ATxmega16D4, ATxmega32D4, ATxmega64D3, ATxmega128D3, ATxmega192D3, ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, ATmega165, ATmega165P, ATmega325, ATmega325A, ATmega3250, ATmega325A, ATmega645, ATmega6450, ATmega169, ATmega169P, ATmega329, ATmega329A, ATmega3290, ATmega3290A, ATmega649, ATmega6490, ATmega164P, ATmega324P, ATmega644, ATmega406, ATmega48, ATmega88, ATmega168, ATtiny24, ATtiny44, ATtiny84, ATtiny84A, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny461, ATtiny861, ATmega256RFR2, ATmega2564RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega64RFR2, ATmega644RFR2</td>
402  </tr>
403 
404  <tr>
405  <td>power_all_disable()</td>
406  <td>Disable all modules.</td>
407  <td>ATxmega6A4, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmegaA1, ATxmegaA1U, ATxmega128A3, ATxmega192A3, ATxmega256A3, ATxmegaA3B, ATxmega16D4, ATxmega32D4, ATxmega64D3, ATxmega128D3,ATxmega192D3, ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, ATmega165, ATmega165P, ATmega325, ATmega325A, ATmega3250, ATmega325A, ATmega645, ATmega6450, ATmega169, ATmega169P, ATmega329, ATmega329A, ATmega3290, ATmega3290A, ATmega649, ATmega6490, ATmega164P, ATmega324P, ATmega644, ATmega406, ATmega48, ATmega88, ATmega168, ATtiny24, ATtiny44, ATtiny84, ATtiny84A, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny461, ATtiny861, ATmega256RFR2, ATmega2564RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega64RFR2, ATmega644RFR2</td>
408  </tr>
409 </table>
410 </center>
411 </small>
412 
413 @} */
414 
415 // Xmega A series has AES, EBI and DMA bits
416 // Include any other device on need basis
417 #if defined(__AVR_ATxmega16A4__) \
418 || defined(__AVR_ATxmega32A4__) \
419 || defined(__AVR_ATxmega64A1__) \
420 || defined(__AVR_ATxmega64A1U__) \
421 || defined(__AVR_ATxmega64A3__) \
422 || defined(__AVR_ATxmega128A1__) \
423 || defined(__AVR_ATxmega128A1U__) \
424 || defined(__AVR_ATxmega128A3__) \
425 || defined(__AVR_ATxmega192A3__) \
426 || defined(__AVR_ATxmega256A3__) \
427 || defined(__AVR_ATxmega256A3B__)
428 
429 #define power_aes_enable() (PR_PRGEN &= (uint8_t)~(PR_AES_bm))
430 #define power_aes_disable() (PR_PRGEN |= (uint8_t)PR_AES_bm)
431 
432 #define power_ebi_enable() (PR_PRGEN &= (uint8_t)~(PR_EBI_bm))
433 #define power_ebi_disable() (PR_PRGEN |= (uint8_t)PR_EBI_bm)
434 
435 #define power_dma_enable() (PR_PRGEN &= (uint8_t)~(PR_DMA_bm))
436 #define power_dma_disable() (PR_PRGEN |= (uint8_t)PR_DMA_bm)
437 
438 #define power_daca_enable() (PR_PRPA &= (uint8_t)~(PR_DAC_bm))
439 #define power_daca_disable() (PR_PRPA |= (uint8_t)PR_DAC_bm)
440 #define power_dacb_enable() (PR_PRPB &= (uint8_t)~(PR_DAC_bm))
441 #define power_dacb_disable() (PR_PRPB |= (uint8_t)PR_DAC_bm)
442 
443 #define power_usartc1_enable() (PR_PRPC &= (uint8_t)~(PR_USART1_bm))
444 #define power_usartc1_disable() (PR_PRPC |= (uint8_t)PR_USART1_bm)
445 #define power_usartd1_enable() (PR_PRPD &= (uint8_t)~(PR_USART1_bm))
446 #define power_usartd1_disable() (PR_PRPD |= (uint8_t)PR_USART1_bm)
447 #define power_usarte1_enable() (PR_PRPE &= (uint8_t)~(PR_USART1_bm))
448 #define power_usarte1_disable() (PR_PRPE |= (uint8_t)PR_USART1_bm)
449 #define power_usartf1_enable() (PR_PRPF &= (uint8_t)~(PR_USART1_bm))
450 #define power_usartf1_disable() (PR_PRPF |= (uint8_t)PR_USART1_bm)
451 
452 #define power_all_enable() \
453 do { \
454  PR_PRGEN &= (uint8_t)~(PR_AES_bm|PR_EBI_bm|PR_RTC_bm|PR_EVSYS_bm|PR_DMA_bm); \
455  PR_PRPA &= (uint8_t)~(PR_DAC_bm|PR_ADC_bm|PR_AC_bm); \
456  PR_PRPB &= (uint8_t)~(PR_DAC_bm|PR_ADC_bm|PR_AC_bm); \
457  PR_PRPC &= (uint8_t)~(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
458  PR_PRPD &= (uint8_t)~(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
459  PR_PRPE &= (uint8_t)~(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
460  PR_PRPF &= (uint8_t)~(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
461 } while(0)
462 
463 
464 #define power_all_disable() \
465 do { \
466  PR_PRGEN|= (uint8_t)(PR_AES_bm|PR_EBI_bm|PR_RTC_bm|PR_EVSYS_bm|PR_DMA_bm); \
467  PR_PRPA |= (uint8_t)(PR_DAC_bm|PR_ADC_bm|PR_AC_bm); \
468  PR_PRPB |= (uint8_t)(PR_DAC_bm|PR_ADC_bm|PR_AC_bm); \
469  PR_PRPC |= (uint8_t)(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
470  PR_PRPD |= (uint8_t)(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
471  PR_PRPE |= (uint8_t)(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
472  PR_PRPF |= (uint8_t)(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
473 } while(0)
474 #endif
475 
476 #if defined(__AVR_ATxmega16A4__) \
477 || defined(__AVR_ATxmega16D4__) \
478 || defined(__AVR_ATxmega32A4__) \
479 || defined(__AVR_ATxmega32D4__) \
480 || defined(__AVR_ATxmega64A1__) \
481 || defined(__AVR_ATxmega64A1U__) \
482 || defined(__AVR_ATxmega64A3__) \
483 || defined(__AVR_ATxmega64D3__) \
484 || defined(__AVR_ATxmega128A1__) \
485 || defined(__AVR_ATxmega128A1U__) \
486 || defined(__AVR_ATxmega128A3__) \
487 || defined(__AVR_ATxmega128D3__) \
488 || defined(__AVR_ATxmega192A3__) \
489 || defined(__AVR_ATxmega192D3__) \
490 || defined(__AVR_ATxmega256A3__) \
491 || defined(__AVR_ATxmega256A3B__)
492 
493 
494 #define power_rtc_enable() (PR_PRGEN &= (uint8_t)~(PR_RTC_bm))
495 #define power_rtc_disable() (PR_PRGEN |= (uint8_t)PR_RTC_bm)
496 
497 #define power_evsys_enable() (PR_PRGEN &= (uint8_t)~(PR_EVSYS_bm))
498 #define power_evsys_disable() (PR_PRGEN |= (uint8_t)PR_EVSYS_bm)
499 
500 #define power_adca_enable() (PR_PRPA &= (uint8_t)~(PR_ADC_bm))
501 #define power_adca_disable() (PR_PRPA |= (uint8_t)PR_ADC_bm)
502 #define power_adcb_enable() (PR_PRPB &= (uint8_t)~(PR_ADC_bm))
503 #define power_adcb_disable() (PR_PRPB |= (uint8_t)PR_ADC_bm)
504 
505 #define power_aca_enable() (PR_PRPA &= (uint8_t)~(PR_AC_bm))
506 #define power_aca_disable() (PR_PRPA |= (uint8_t)PR_AC_bm)
507 #define power_acb_enable() (PR_PRPB &= (uint8_t)~(PR_AC_bm))
508 #define power_acb_disable() (PR_PRPB |= (uint8_t)PR_AC_bm)
509 
510 #define power_twic_enable() (PR_PRPC &= (uint8_t)~(PR_TWI_bm))
511 #define power_twic_disable() (PR_PRPC |= (uint8_t)PR_TWI_bm)
512 #define power_twid_enable() (PR_PRPD &= (uint8_t)~(PR_TWI_bm))
513 #define power_twid_disable() (PR_PRPD |= (uint8_t)PR_TWI_bm)
514 #define power_twie_enable() (PR_PRPE &= (uint8_t)~(PR_TWI_bm))
515 #define power_twie_disable() (PR_PRPE |= (uint8_t)PR_TWI_bm)
516 #define power_twif_enable() (PR_PRPF &= (uint8_t)~(PR_TWI_bm))
517 #define power_twif_disable() (PR_PRPF |= (uint8_t)PR_TWI_bm)
518 
519 #define power_usartc0_enable() (PR_PRPC &= (uint8_t)~(PR_USART0_bm))
520 #define power_usartc0_disable() (PR_PRPC |= (uint8_t)PR_USART0_bm)
521 #define power_usartd0_enable() (PR_PRPD &= (uint8_t)~(PR_USART0_bm))
522 #define power_usartd0_disable() (PR_PRPD |= (uint8_t)PR_USART0_bm)
523 #define power_usarte0_enable() (PR_PRPE &= (uint8_t)~(PR_USART0_bm))
524 #define power_usarte0_disable() (PR_PRPE |= (uint8_t)PR_USART0_bm)
525 #define power_usartf0_enable() (PR_PRPF &= (uint8_t)~(PR_USART0_bm))
526 #define power_usartf0_disable() (PR_PRPF |= (uint8_t)PR_USART0_bm)
527 
528 #define power_spic_enable() (PR_PRPC &= (uint8_t)~(PR_SPI_bm))
529 #define power_spic_disable() (PR_PRPC |= (uint8_t)PR_SPI_bm)
530 #define power_spid_enable() (PR_PRPD &= (uint8_t)~(PR_SPI_bm))
531 #define power_spid_disable() (PR_PRPD |= (uint8_t)PR_SPI_bm)
532 #define power_spie_enable() (PR_PRPE &= (uint8_t)~(PR_SPI_bm))
533 #define power_spie_disable() (PR_PRPE |= (uint8_t)PR_SPI_bm)
534 #define power_spif_enable() (PR_PRPF &= (uint8_t)~(PR_SPI_bm))
535 #define power_spif_disable() (PR_PRPF |= (uint8_t)PR_SPI_bm)
536 
537 #define power_hiresc_enable() (PR_PRPC &= (uint8_t)~(PR_HIRES_bm))
538 #define power_hiresc_disable() (PR_PRPC |= (uint8_t)PR_HIRES_bm)
539 #define power_hiresd_enable() (PR_PRPD &= (uint8_t)~(PR_HIRES_bm))
540 #define power_hiresd_disable() (PR_PRPD |= (uint8_t)PR_HIRES_bm)
541 #define power_hirese_enable() (PR_PRPE &= (uint8_t)~(PR_HIRES_bm))
542 #define power_hirese_disable() (PR_PRPE |= (uint8_t)PR_HIRES_bm)
543 #define power_hiresf_enable() (PR_PRPF &= (uint8_t)~(PR_HIRES_bm))
544 #define power_hiresf_disable() (PR_PRPF |= (uint8_t)PR_HIRES_bm)
545 
546 #define power_tc1c_enable() (PR_PRPC &= (uint8_t)~(PR_TC1_bm))
547 #define power_tc1c_disable() (PR_PRPC |= (uint8_t)PR_TC1_bm)
548 #define power_tc1d_enable() (PR_PRPD &= (uint8_t)~(PR_TC1_bm))
549 #define power_tc1d_disable() (PR_PRPD |= (uint8_t)PR_TC1_bm)
550 #define power_tc1e_enable() (PR_PRPE &= (uint8_t)~(PR_TC1_bm))
551 #define power_tc1e_disable() (PR_PRPE |= (uint8_t)PR_TC1_bm)
552 #define power_tc1f_enable() (PR_PRPF &= (uint8_t)~(PR_TC1_bm))
553 #define power_tc1f_disable() (PR_PRPF |= (uint8_t)PR_TC1_bm)
554 
555 #define power_tc0c_enable() (PR_PRPC &= (uint8_t)~(PR_TC0_bm))
556 #define power_tc0c_disable() (PR_PRPC |= (uint8_t)PR_TC0_bm)
557 #define power_tc0d_enable() (PR_PRPD &= (uint8_t)~(PR_TC0_bm))
558 #define power_tc0d_disable() (PR_PRPD |= (uint8_t)PR_TC0_bm)
559 #define power_tc0e_enable() (PR_PRPE &= (uint8_t)~(PR_TC0_bm))
560 #define power_tc0e_disable() (PR_PRPE |= (uint8_t)PR_TC0_bm)
561 #define power_tc0f_enable() (PR_PRPF &= (uint8_t)~(PR_TC0_bm))
562 #define power_tc0f_disable() (PR_PRPF |= (uint8_t)PR_TC0_bm)
563 
564 #endif
565 
566 #if defined(__AVR_ATxmega16D4__) \
567 || defined(__AVR_ATxmega32D4__) \
568 || defined(__AVR_ATxmega64D3__) \
569 || defined(__AVR_ATxmega128D3__) \
570 || defined(__AVR_ATxmega192D3__)
571 
572 #define power_all_enable() \
573 do { \
574  PR_PRGEN &= (uint8_t)~(PR_RTC_bm|PR_EVSYS_bm); \
575  PR_PRPA &= (uint8_t)~(PR_ADC_bm|PR_AC_bm); \
576  PR_PRPB &= (uint8_t)~(PR_ADC_bm|PR_AC_bm); \
577  PR_PRPC &= (uint8_t)~(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
578  PR_PRPD &= (uint8_t)~(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
579  PR_PRPE &= (uint8_t)~(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
580  PR_PRPF &= (uint8_t)~(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
581 } while(0)
582 
583 
584 #define power_all_disable() \
585 do { \
586  PR_PRGEN|= (uint8_t)(PR_EBI_bm|PR_RTC_bm|PR_EVSYS_bm|PR_DMA_bm); \
587  PR_PRPA |= (uint8_t)(PR_ADC_bm|PR_AC_bm); \
588  PR_PRPB |= (uint8_t)(PR_ADC_bm|PR_AC_bm); \
589  PR_PRPC |= (uint8_t)(PR_TWI_bm|R_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
590  PR_PRPD |= (uint8_t)(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
591  PR_PRPE |= (uint8_t)(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
592  PR_PRPF |= (uint8_t)(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
593 } while(0)
594 
595 #elif defined(__AVR_ATmega640__) \
596 || defined(__AVR_ATmega1280__) \
597 || defined(__AVR_ATmega1281__) \
598 || defined(__AVR_ATmega2560__) \
599 || defined(__AVR_ATmega2561__)
600 
601 #define power_adc_enable() (PRR0 &= (uint8_t)~(1 << PRADC))
602 #define power_adc_disable() (PRR0 |= (uint8_t)(1 << PRADC))
603 
604 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
605 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
606 
607 #define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
608 #define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
609 
610 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
611 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
612 
613 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
614 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
615 
616 #define power_timer2_enable() (PRR0 &= (uint8_t)~(1 << PRTIM2))
617 #define power_timer2_disable() (PRR0 |= (uint8_t)(1 << PRTIM2))
618 
619 #define power_timer3_enable() (PRR1 &= (uint8_t)~(1 << PRTIM3))
620 #define power_timer3_disable() (PRR1 |= (uint8_t)(1 << PRTIM3))
621 
622 #define power_timer4_enable() (PRR1 &= (uint8_t)~(1 << PRTIM4))
623 #define power_timer4_disable() (PRR1 |= (uint8_t)(1 << PRTIM4))
624 
625 #define power_timer5_enable() (PRR1 &= (uint8_t)~(1 << PRTIM5))
626 #define power_timer5_disable() (PRR1 |= (uint8_t)(1 << PRTIM5))
627 
628 #define power_usart0_enable() (PRR0 &= (uint8_t)~(1 << PRUSART0))
629 #define power_usart0_disable() (PRR0 |= (uint8_t)(1 << PRUSART0))
630 
631 #define power_usart1_enable() (PRR1 &= (uint8_t)~(1 << PRUSART1))
632 #define power_usart1_disable() (PRR1 |= (uint8_t)(1 << PRUSART1))
633 
634 #define power_usart2_enable() (PRR1 &= (uint8_t)~(1 << PRUSART2))
635 #define power_usart2_disable() (PRR1 |= (uint8_t)(1 << PRUSART2))
636 
637 #define power_usart3_enable() (PRR1 &= (uint8_t)~(1 << PRUSART3))
638 #define power_usart3_disable() (PRR1 |= (uint8_t)(1 << PRUSART3))
639 
640 #define power_all_enable() \
641 do{ \
642  PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)); \
643  PRR1 &= (uint8_t)~((1<<PRTIM3)|(1<<PRTIM4)|(1<<PRTIM5)|(1<<PRTIM5)|(1<<PRUSART1)|(1<<PRUSART2)|(1<<PRUSART3)); \
644 }while(0)
645 
646 #define power_all_disable() \
647 do{ \
648  PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)); \
649  PRR1 |= (uint8_t)((1<<PRTIM3)|(1<<PRTIM4)|(1<<PRTIM5)|(1<<PRTIM5)|(1<<PRUSART1)|(1<<PRUSART2)|(1<<PRUSART3)); \
650 }while(0)
651 
652 
653 #elif defined(__AVR_ATmega128RFA1__)
654 
655 #define power_adc_enable() (PRR0 &= (uint8_t)~(1 << PRADC))
656 #define power_adc_disable() (PRR0 |= (uint8_t)(1 << PRADC))
657 
658 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
659 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
660 
661 #define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
662 #define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
663 
664 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
665 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
666 
667 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
668 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
669 
670 #define power_timer2_enable() (PRR0 &= (uint8_t)~(1 << PRTIM2))
671 #define power_timer2_disable() (PRR0 |= (uint8_t)(1 << PRTIM2))
672 
673 #define power_timer3_enable() (PRR1 &= (uint8_t)~(1 << PRTIM3))
674 #define power_timer3_disable() (PRR1 |= (uint8_t)(1 << PRTIM3))
675 
676 #define power_timer4_enable() (PRR1 &= (uint8_t)~(1 << PRTIM4))
677 #define power_timer4_disable() (PRR1 |= (uint8_t)(1 << PRTIM4))
678 
679 #define power_timer5_enable() (PRR1 &= (uint8_t)~(1 << PRTIM5))
680 #define power_timer5_disable() (PRR1 |= (uint8_t)(1 << PRTIM5))
681 
682 #define power_usart0_enable() (PRR0 &= (uint8_t)~(1 << PRUSART0))
683 #define power_usart0_disable() (PRR0 |= (uint8_t)(1 << PRUSART0))
684 
685 #define power_usart1_enable() (PRR1 &= (uint8_t)~(1 << PRUSART1))
686 #define power_usart1_disable() (PRR1 |= (uint8_t)(1 << PRUSART1))
687 
688 #define power_all_enable() \
689 do{ \
690  PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)); \
691  PRR1 &= (uint8_t)~((1<<PRTIM3)|(1<<PRTIM4)|(1<<PRTIM5)|(1<<PRTIM5)|(1<<PRUSART1)); \
692 }while(0)
693 
694 #define power_all_disable() \
695 do{ \
696  PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)); \
697  PRR1 |= (uint8_t)((1<<PRTIM3)|(1<<PRTIM4)|(1<<PRTIM5)|(1<<PRTIM5)|(1<<PRUSART1)); \
698 }while(0)
699 
700 #elif defined(__AVR_ATmega256RFR2__) \
701 || defined(__AVR_ATmega128RFR2__) \
702 || defined(__AVR_ATmega64RFR2__) \
703 || defined(__AVR_ATmega2564RFR2__) \
704 || defined(__AVR_ATmega1284RFR2__) \
705 || defined(__AVR_ATmega644RFR2__) \
706 
707 #define power_adc_enable() (PRR0 &= (uint8_t)~(1 << PRADC))
708 #define power_adc_disable() (PRR0 |= (uint8_t)(1 << PRADC))
709 
710 #define power_usart0_enable() (PRR0 &= (uint8_t)~(1 << PRUSART0))
711 #define power_usart0_disable() (PRR0 |= (uint8_t)(1 << PRUSART0))
712 
713 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
714 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
715 
716 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
717 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
718 
719 #define power_pga_enable() (PRR0 &= (uint8_t)~(1 << PRPGA))
720 #define power_pga_disable() (PRR0 |= (uint8_t)(1 << PRPGA))
721 
722 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
723 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
724 
725 #define power_timer2_enable() (PRR0 &= (uint8_t)~(1 << PRTIM2))
726 #define power_timer2_disable() (PRR0 |= (uint8_t)(1 << PRTIM2))
727 
728 #define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
729 #define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
730 
731 #define power_usart1_enable() (PRR1 &= (uint8_t)~(1 << PRUSART1))
732 #define power_usart1_disable() (PRR1 |= (uint8_t)(1 << PRUSART1))
733 
734 #define power_timer3_enable() (PRR1 &= (uint8_t)~(1 << PRTIM3))
735 #define power_timer3_disable() (PRR1 |= (uint8_t)(1 << PRTIM3))
736 
737 #define power_timer4_enable() (PRR1 &= (uint8_t)~(1 << PRTIM4))
738 #define power_timer4_disable() (PRR1 |= (uint8_t)(1 << PRTIM4))
739 
740 #define power_timer5_enable() (PRR1 &= (uint8_t)~(1 << PRTIM5))
741 #define power_timer5_disable() (PRR1 |= (uint8_t)(1 << PRTIM5))
742 
743 #define power_transceiver_enable() (PRR1 &= (uint8_t)~(1 << PRTRX24))
744 #define power_transceiver_disable() (PRR1 |= (uint8_t)(1 << PRTRX24))
745 
746 #define power_ram0_enable() (PRR2 &= (uint8_t)~(1 << PRRAM0))
747 #define power_ram0_disable() (PRR2 |= (uint8_t)(1 << PRRAM0))
748 
749 #define power_ram1_enable() (PRR2 &= (uint8_t)~(1 << PRRAM1))
750 #define power_ram1_disable() (PRR2 |= (uint8_t)(1 << PRRAM1))
751 
752 #define power_ram2_enable() (PRR2 &= (uint8_t)~(1 << PRRAM2))
753 #define power_ram2_disable() (PRR2 |= (uint8_t)(1 << PRRAM2))
754 
755 #define power_ram3_enable() (PRR2 &= (uint8_t)~(1 << PRRAM3))
756 #define power_ram3_disable() (PRR2 |= (uint8_t)(1 << PRRAM3))
757 
758 #define power_all_enable() \
759 do{ \
760  PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)); \
761  PRR1 &= (uint8_t)~((1<<PRUSART1)|(1<<PRTIM3)|(1<<PRTIM4)|(1<<PRTIM5)|(1<<PRTRX24)); \
762  PRR2 &= (uint8_t)~((1<<PRRAM0)|(1<<PRRAM1)|(1<<PRRAM2)|(1<<PRRAM3)); \
763 }while(0)
764 
765 #define power_all_disable() \
766 do{ \
767  PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)); \
768  PRR1 |= (uint8_t)((1<<PRUSART1)|(1<<PRTIM3)|(1<<PRTIM4)|(1<<PRTIM5)|(1<<PRTRX24)); \
769  PRR2 |= (uint8_t)((1<<PRRAM0)|(1<<PRRAM1)|(1<<PRRAM2)|(1<<PRRAM3)); \
770 }while(0)
771 
772 #elif defined(__AVR_AT90USB646__) \
773 || defined(__AVR_AT90USB647__) \
774 || defined(__AVR_AT90USB1286__) \
775 || defined(__AVR_AT90USB1287__)
776 
777 #define power_adc_enable() (PRR0 &= (uint8_t)~(1 << PRADC))
778 #define power_adc_disable() (PRR0 |= (uint8_t)(1 << PRADC))
779 
780 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
781 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
782 
783 #define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
784 #define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
785 
786 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
787 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
788 
789 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
790 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
791 
792 #define power_timer2_enable() (PRR0 &= (uint8_t)~(1 << PRTIM2))
793 #define power_timer2_disable() (PRR0 |= (uint8_t)(1 << PRTIM2))
794 
795 #define power_timer3_enable() (PRR1 &= (uint8_t)~(1 << PRTIM3))
796 #define power_timer3_disable() (PRR1 |= (uint8_t)(1 << PRTIM3))
797 
798 #define power_usart1_enable() (PRR1 &= (uint8_t)~(1 << PRUSART1))
799 #define power_usart1_disable() (PRR1 |= (uint8_t)(1 << PRUSART1))
800 
801 #define power_usb_enable() (PRR1 &= (uint8_t)~(1 << PRUSB))
802 #define power_usb_disable() (PRR1 |= (uint8_t)(1 << PRUSB))
803 
804 #define power_all_enable() \
805 do{ \
806  PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)); \
807  PRR1 &= (uint8_t)~((1<<PRTIM3)|(1<<PRUSART1)|(1<<PRUSB)); \
808 }while(0)
809 
810 #define power_all_disable() \
811 do{ \
812  PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)); \
813  PRR1 |= (uint8_t)((1<<PRTIM3)|(1<<PRUSART1)|(1<<PRUSB)); \
814 }while(0)
815 
816 
817 #elif defined(__AVR_ATmega32U4__) \
818 || defined(__AVR_ATmega16U4__)
819 
820 
821 #define power_adc_enable() (PRR0 &= (uint8_t)~(1 << PRADC))
822 #define power_adc_disable() (PRR0 |= (uint8_t)(1 << PRADC))
823 
824 #define power_usart0_enable() (PRR0 &= (uint8_t)~(1 << PRUSART0))
825 #define power_usart0_disable() (PRR0 |= (uint8_t)(1 << PRUSART0))
826 
827 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
828 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
829 
830 #define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
831 #define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
832 
833 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
834 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
835 
836 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
837 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
838 
839 #define power_timer2_enable() (PRR0 &= (uint8_t)~(1 << PRTIM2))
840 #define power_timer2_disable() (PRR0 |= (uint8_t)(1 << PRTIM2))
841 
842 #define power_timer3_enable() (PRR1 &= (uint8_t)~(1 << PRTIM3))
843 #define power_timer3_disable() (PRR1 |= (uint8_t)(1 << PRTIM3))
844 
845 #define power_usart1_enable() (PRR1 &= (uint8_t)~(1 << PRUSART1))
846 #define power_usart1_disable() (PRR1 |= (uint8_t)(1 << PRUSART1))
847 
848 #define power_usb_enable() (PRR1 &= (uint8_t)~(1 << PRUSB))
849 #define power_usb_disable() (PRR1 |= (uint8_t)(1 << PRUSB))
850 
851 #define power_all_enable() \
852 do{ \
853  PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRUSART0)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)); \
854  PRR1 &= (uint8_t)~((1<<PRTIM3)|(1<<PRUSART1)|(1<<PRUSB)); \
855 }while(0)
856 
857 #define power_all_disable() \
858 do{ \
859  PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRUSART0)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)); \
860  PRR1 |= (uint8_t)((1<<PRTIM3)|(1<<PRUSART1)|(1<<PRUSB)); \
861 }while(0)
862 
863 
864 #elif defined(__AVR_ATmega32U6__)
865 
866 
867 #define power_adc_enable() (PRR0 &= (uint8_t)~(1 << PRADC))
868 #define power_adc_disable() (PRR0 |= (uint8_t)(1 << PRADC))
869 
870 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
871 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
872 
873 #define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
874 #define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
875 
876 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
877 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
878 
879 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
880 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
881 
882 #define power_timer2_enable() (PRR0 &= (uint8_t)~(1 << PRTIM2))
883 #define power_timer2_disable() (PRR0 |= (uint8_t)(1 << PRTIM2))
884 
885 #define power_timer3_enable() (PRR1 &= (uint8_t)~(1 << PRTIM3))
886 #define power_timer3_disable() (PRR1 |= (uint8_t)(1 << PRTIM3))
887 
888 #define power_usart1_enable() (PRR1 &= (uint8_t)~(1 << PRUSART1))
889 #define power_usart1_disable() (PRR1 |= (uint8_t)(1 << PRUSART1))
890 
891 #define power_usb_enable() (PRR1 &= (uint8_t)~(1 << PRUSB))
892 #define power_usb_disable() (PRR1 |= (uint8_t)(1 << PRUSB))
893 
894 #define power_all_enable() \
895 do{ \
896  PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)); \
897  PRR1 &= (uint8_t)~((1<<PRTIM3)|(1<<PRUSART1)|(1<<PRUSB)); \
898 }while(0)
899 
900 #define power_all_disable() \
901 do{ \
902  PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)); \
903  PRR1 |= (uint8_t)((1<<PRTIM3)|(1<<PRUSART1)|(1<<PRUSB)); \
904 }while(0)
905 
906 
907 #elif defined(__AVR_AT90PWM1__)
908 
909 #define power_adc_enable() (PRR &= (uint8_t)~(1 << PRADC))
910 #define power_adc_disable() (PRR |= (uint8_t)(1 << PRADC))
911 
912 #define power_spi_enable() (PRR &= (uint8_t)~(1 << PRSPI))
913 #define power_spi_disable() (PRR |= (uint8_t)(1 << PRSPI))
914 
915 #define power_timer0_enable() (PRR &= (uint8_t)~(1 << PRTIM0))
916 #define power_timer0_disable() (PRR |= (uint8_t)(1 << PRTIM0))
917 
918 #define power_timer1_enable() (PRR &= (uint8_t)~(1 << PRTIM1))
919 #define power_timer1_disable() (PRR |= (uint8_t)(1 << PRTIM1))
920 
921 /* Power Stage Controller 0 */
922 #define power_psc0_enable() (PRR &= (uint8_t)~(1 << PRPSC0))
923 #define power_psc0_disable() (PRR |= (uint8_t)(1 << PRPSC0))
924 
925 /* Power Stage Controller 1 */
926 #define power_psc1_enable() (PRR &= (uint8_t)~(1 << PRPSC1))
927 #define power_psc1_disable() (PRR |= (uint8_t)(1 << PRPSC1))
928 
929 /* Power Stage Controller 2 */
930 #define power_psc2_enable() (PRR &= (uint8_t)~(1 << PRPSC2))
931 #define power_psc2_disable() (PRR |= (uint8_t)(1 << PRPSC2))
932 
933 #define power_all_enable() (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRPSC0)|(1<<PRPSC1)|(1<<PRPSC2)))
934 #define power_all_disable() (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRPSC0)|(1<<PRPSC1)|(1<<PRPSC2)))
935 
936 
937 #elif defined(__AVR_AT90PWM2__) \
938 || defined(__AVR_AT90PWM2B__) \
939 || defined(__AVR_AT90PWM3__) \
940 || defined(__AVR_AT90PWM3B__) \
941 || defined(__AVR_AT90PWM216__) \
942 || defined(__AVR_AT90PWM316__)
943 
944 #define power_adc_enable() (PRR &= (uint8_t)~(1 << PRADC))
945 #define power_adc_disable() (PRR |= (uint8_t)(1 << PRADC))
946 
947 #define power_spi_enable() (PRR &= (uint8_t)~(1 << PRSPI))
948 #define power_spi_disable() (PRR |= (uint8_t)(1 << PRSPI))
949 
950 #define power_usart_enable() (PRR &= (uint8_t)~(1 << PRUSART))
951 #define power_usart_disable() (PRR |= (uint8_t)(1 << PRUSART))
952 
953 #define power_timer0_enable() (PRR &= (uint8_t)~(1 << PRTIM0))
954 #define power_timer0_disable() (PRR |= (uint8_t)(1 << PRTIM0))
955 
956 #define power_timer1_enable() (PRR &= (uint8_t)~(1 << PRTIM1))
957 #define power_timer1_disable() (PRR |= (uint8_t)(1 << PRTIM1))
958 
959 /* Power Stage Controller 0 */
960 #define power_psc0_enable() (PRR &= (uint8_t)~(1 << PRPSC0))
961 #define power_psc0_disable() (PRR |= (uint8_t)(1 << PRPSC0))
962 
963 /* Power Stage Controller 1 */
964 #define power_psc1_enable() (PRR &= (uint8_t)~(1 << PRPSC1))
965 #define power_psc1_disable() (PRR |= (uint8_t)(1 << PRPSC1))
966 
967 /* Power Stage Controller 2 */
968 #define power_psc2_enable() (PRR &= (uint8_t)~(1 << PRPSC2))
969 #define power_psc2_disable() (PRR |= (uint8_t)(1 << PRPSC2))
970 
971 #define power_all_enable() (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRPSC0)|(1<<PRPSC1)|(1<<PRPSC2)))
972 #define power_all_disable() (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRPSC0)|(1<<PRPSC1)|(1<<PRPSC2)))
973 
974 
975 #elif defined(__AVR_AT90PWM81__)
976 
977 #define power_adc_enable() (PRR &= (uint8_t)~(1 << PRADC))
978 #define power_adc_disable() (PRR |= (uint8_t)(1 << PRADC))
979 
980 #define power_spi_enable() (PRR &= (uint8_t)~(1 << PRSPI))
981 #define power_spi_disable() (PRR |= (uint8_t)(1 << PRSPI))
982 
983 #define power_timer1_enable() (PRR &= (uint8_t)~(1 << PRTIM1))
984 #define power_timer1_disable() (PRR |= (uint8_t)(1 << PRTIM1))
985 
986 /* Reduced Power Stage Controller */
987 #define power_pscr_enable() (PRR &= (uint8_t)~(1 << PRPSCR))
988 #define power_pscr_disable() (PRR |= (uint8_t)(1 << PRPSCR))
989 
990 /* Power Stage Controller 2 */
991 #define power_psc2_enable() (PRR &= (uint8_t)~(1 << PRPSC2))
992 #define power_psc2_disable() (PRR |= (uint8_t)(1 << PRPSC2))
993 
994 #define power_all_enable() (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTIM1)|(1<<PRPSCR)|(1<<PRPSC2)))
995 #define power_all_disable() (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTIM1)|(1<<PRPSCR)|(1<<PRPSC2)))
996 
997 
998 #elif defined(__AVR_ATmega165__) \
999 || defined(__AVR_ATmega165A__) \
1000 || defined(__AVR_ATmega165P__) \
1001 || defined(__AVR_ATmega325__) \
1002 || defined(__AVR_ATmega325A__) \
1003 || defined(__AVR_ATmega3250__) \
1004 || defined(__AVR_ATmega3250A__) \
1005 || defined(__AVR_ATmega645__) \
1006 || defined(__AVR_ATmega645A__) \
1007 || defined(__AVR_ATmega645P__) \
1008 || defined(__AVR_ATmega6450__) \
1009 || defined(__AVR_ATmega6450A__) \
1010 || defined(__AVR_ATmega6450P__)
1011 
1012 #define power_adc_enable() (PRR &= (uint8_t)~(1 << PRADC))
1013 #define power_adc_disable() (PRR |= (uint8_t)(1 << PRADC))
1014 
1015 #define power_spi_enable() (PRR &= (uint8_t)~(1 << PRSPI))
1016 #define power_spi_disable() (PRR |= (uint8_t)(1 << PRSPI))
1017 
1018 #define power_usart0_enable() (PRR &= (uint8_t)~(1 << PRUSART0))
1019 #define power_usart0_disable() (PRR |= (uint8_t)(1 << PRUSART0))
1020 
1021 #define power_timer1_enable() (PRR &= (uint8_t)~(1 << PRTIM1))
1022 #define power_timer1_disable() (PRR |= (uint8_t)(1 << PRTIM1))
1023 
1024 #define power_all_enable() (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM1)))
1025 #define power_all_disable() (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM1)))
1026 
1027 
1028 #elif defined(__AVR_ATmega169__) \
1029 || defined(__AVR_ATmega169A__) \
1030 || defined(__AVR_ATmega169P__) \
1031 || defined(__AVR_ATmega169PA__) \
1032 || defined(__AVR_ATmega329__) \
1033 || defined(__AVR_ATmega329A__) \
1034 || defined(__AVR_ATmega329P__) \
1035 || defined(__AVR_ATmega329PA__) \
1036 || defined(__AVR_ATmega3290__) \
1037 || defined(__AVR_ATmega3290A__) \
1038 || defined(__AVR_ATmega3290P__) \
1039 || defined(__AVR_ATmega649__) \
1040 || defined(__AVR_ATmega649A__) \
1041 || defined(__AVR_ATmega649P__) \
1042 || defined(__AVR_ATmega6490__) \
1043 || defined(__AVR_ATmega6490A__) \
1044 || defined(__AVR_ATmega6490P__)
1045 
1046 #define power_adc_enable() (PRR &= (uint8_t)~(1 << PRADC))
1047 #define power_adc_disable() (PRR |= (uint8_t)(1 << PRADC))
1048 
1049 #define power_spi_enable() (PRR &= (uint8_t)~(1 << PRSPI))
1050 #define power_spi_disable() (PRR |= (uint8_t)(1 << PRSPI))
1051 
1052 #define power_usart0_enable() (PRR &= (uint8_t)~(1 << PRUSART0))
1053 #define power_usart0_disable() (PRR |= (uint8_t)(1 << PRUSART0))
1054 
1055 #define power_timer1_enable() (PRR &= (uint8_t)~(1 << PRTIM1))
1056 #define power_timer1_disable() (PRR |= (uint8_t)(1 << PRTIM1))
1057 
1058 #define power_lcd_enable() (PRR &= (uint8_t)~(1 << PRLCD))
1059 #define power_lcd_disable() (PRR |= (uint8_t)(1 << PRLCD))
1060 
1061 #define power_all_enable() (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM1)|(1<<PRLCD)))
1062 #define power_all_disable() (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM1)|(1<<PRLCD)))
1063 
1064 
1065 #elif defined(__AVR_ATmega164A__) \
1066 || defined(__AVR_ATmega164P__) \
1067 || defined(__AVR_ATmega324A__) \
1068 || defined(__AVR_ATmega324P__) \
1069 || defined(__AVR_ATmega324PA__) \
1070 || defined(__AVR_ATmega644P__) \
1071 || defined(__AVR_ATmega644A__) \
1072 || defined(__AVR_ATmega644PA__)
1073 
1074 #define power_adc_enable() (PRR0 &= (uint8_t)~(1 << PRADC))
1075 #define power_adc_disable() (PRR0 |= (uint8_t)(1 << PRADC))
1076 
1077 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
1078 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
1079 
1080 #define power_usart0_enable() (PRR0 &= (uint8_t)~(1 << PRUSART0))
1081 #define power_usart0_disable() (PRR0 |= (uint8_t)(1 << PRUSART0))
1082 
1083 #define power_usart1_enable() (PRR0 &= (uint8_t)~(1 << PRUSART1))
1084 #define power_usart1_disable() (PRR0 |= (uint8_t)(1 << PRUSART1))
1085 
1086 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
1087 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
1088 
1089 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
1090 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
1091 
1092 #define power_timer2_enable() (PRR0 &= (uint8_t)~(1 << PRTIM2))
1093 #define power_timer2_disable() (PRR0 |= (uint8_t)(1 << PRTIM2))
1094 
1095 #define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
1096 #define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
1097 
1098 #define power_all_enable() (PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRUSART1)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRTWI)))
1099 #define power_all_disable() (PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRUSART1)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRTWI)))
1100 
1101 
1102 #elif defined(__AVR_ATmega644__)
1103 
1104 #define power_adc_enable() (PRR0 &= (uint8_t)~(1 << PRADC))
1105 #define power_adc_disable() (PRR0 |= (uint8_t)(1 << PRADC))
1106 
1107 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
1108 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
1109 
1110 #define power_usart0_enable() (PRR0 &= (uint8_t)~(1 << PRUSART0))
1111 #define power_usart0_disable() (PRR0 |= (uint8_t)(1 << PRUSART0))
1112 
1113 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
1114 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
1115 
1116 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
1117 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
1118 
1119 #define power_timer2_enable() (PRR0 &= (uint8_t)~(1 << PRTIM2))
1120 #define power_timer2_disable() (PRR0 |= (uint8_t)(1 << PRTIM2))
1121 
1122 #define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
1123 #define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
1124 
1125 #define power_all_enable() (PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRTWI)))
1126 #define power_all_disable() (PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRTWI)))
1127 
1128 
1129 #elif defined(__AVR_ATmega406__)
1130 
1131 #define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
1132 #define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
1133 
1134 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
1135 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
1136 
1137 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
1138 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
1139 
1140 /* Voltage ADC */
1141 #define power_vadc_enable() (PRR0 &= (uint8_t)~(1 << PRVADC))
1142 #define power_vadc_disable() (PRR0 |= (uint8_t)(1 << PRVADC))
1143 
1144 #define power_all_enable() (PRR0 &= (uint8_t)~((1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRVADC)))
1145 #define power_all_disable() (PRR0 |= (uint8_t)((1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRVADC)))
1146 
1147 
1148 #elif defined(__AVR_ATmega48__) \
1149 || defined(__AVR_ATmega48A__) \
1150 || defined(__AVR_ATmega48P__) \
1151 || defined(__AVR_ATmega88__) \
1152 || defined(__AVR_ATmega88A__) \
1153 || defined(__AVR_ATmega88P__) \
1154 || defined(__AVR_ATmega88PA__) \
1155 || defined(__AVR_ATmega168__) \
1156 || defined(__AVR_ATmega168A__) \
1157 || defined(__AVR_ATmega168P__) \
1158 || defined(__AVR_ATmega328__) \
1159 || defined(__AVR_ATmega328P__) \
1160 || defined(__AVR_ATtiny48__) \
1161 || defined(__AVR_ATtiny88__)
1162 
1163 #define power_adc_enable() (PRR &= (uint8_t)~(1 << PRADC))
1164 #define power_adc_disable() (PRR |= (uint8_t)(1 << PRADC))
1165 
1166 #define power_spi_enable() (PRR &= (uint8_t)~(1 << PRSPI))
1167 #define power_spi_disable() (PRR |= (uint8_t)(1 << PRSPI))
1168 
1169 #define power_usart0_enable() (PRR &= (uint8_t)~(1 << PRUSART0))
1170 #define power_usart0_disable() (PRR |= (uint8_t)(1 << PRUSART0))
1171 
1172 #define power_timer0_enable() (PRR &= (uint8_t)~(1 << PRTIM0))
1173 #define power_timer0_disable() (PRR |= (uint8_t)(1 << PRTIM0))
1174 
1175 #define power_timer1_enable() (PRR &= (uint8_t)~(1 << PRTIM1))
1176 #define power_timer1_disable() (PRR |= (uint8_t)(1 << PRTIM1))
1177 
1178 #define power_timer2_enable() (PRR &= (uint8_t)~(1 << PRTIM2))
1179 #define power_timer2_disable() (PRR |= (uint8_t)(1 << PRTIM2))
1180 
1181 #define power_twi_enable() (PRR &= (uint8_t)~(1 << PRTWI))
1182 #define power_twi_disable() (PRR |= (uint8_t)(1 << PRTWI))
1183 
1184 #define power_all_enable() (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRTWI)))
1185 #define power_all_disable() (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRTWI)))
1186 
1187 
1188 #elif defined(__AVR_ATtiny24__) \
1189 || defined(__AVR_ATtiny24A__) \
1190 || defined(__AVR_ATtiny44__) \
1191 || defined(__AVR_ATtiny44A__) \
1192 || defined(__AVR_ATtiny84__) \
1193 || defined(__AVR_ATtiny84A__) \
1194 || defined(__AVR_ATtiny25__) \
1195 || defined(__AVR_ATtiny45__) \
1196 || defined(__AVR_ATtiny85__) \
1197 || defined(__AVR_ATtiny261__) \
1198 || defined(__AVR_ATtiny261A__) \
1199 || defined(__AVR_ATtiny461__) \
1200 || defined(__AVR_ATtiny461A__) \
1201 || defined(__AVR_ATtiny861__) \
1202 || defined(__AVR_ATtiny861A__) \
1203 || defined(__AVR_ATtiny43U__)
1204 
1205 #define power_adc_enable() (PRR &= (uint8_t)~(1 << PRADC))
1206 #define power_adc_disable() (PRR |= (uint8_t)(1 << PRADC))
1207 
1208 #define power_timer0_enable() (PRR &= (uint8_t)~(1 << PRTIM0))
1209 #define power_timer0_disable() (PRR |= (uint8_t)(1 << PRTIM0))
1210 
1211 #define power_timer1_enable() (PRR &= (uint8_t)~(1 << PRTIM1))
1212 #define power_timer1_disable() (PRR |= (uint8_t)(1 << PRTIM1))
1213 
1214 /* Universal Serial Interface */
1215 #define power_usi_enable() (PRR &= (uint8_t)~(1 << PRUSI))
1216 #define power_usi_disable() (PRR |= (uint8_t)(1 << PRUSI))
1217 
1218 #define power_all_enable() (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRUSI)))
1219 #define power_all_disable() (PRR |= (uint8_t)((1<<PRADC)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRUSI)))
1220 
1221 
1222 #elif defined(__AVR_ATmega1284P__)
1223 
1224 
1225 #define power_adc_enable() (PRR0 &= (uint8_t)~(1 << PRADC))
1226 #define power_adc_disable() (PRR0 |= (uint8_t)(1 << PRADC))
1227 
1228 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
1229 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
1230 
1231 #define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
1232 #define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
1233 
1234 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
1235 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
1236 
1237 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
1238 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
1239 
1240 #define power_timer2_enable() (PRR0 &= (uint8_t)~(1 << PRTIM2))
1241 #define power_timer2_disable() (PRR0 |= (uint8_t)(1 << PRTIM2))
1242 
1243 #define power_timer3_enable() (PRR1 &= (uint8_t)~(1 << PRTIM3))
1244 #define power_timer3_disable() (PRR1 |= (uint8_t)(1 << PRTIM3))
1245 
1246 #define power_usart0_enable() (PRR0 &= (uint8_t)~(1 << PRUSART0))
1247 #define power_usart0_disable() (PRR0 |= (uint8_t)(1 << PRUSART0))
1248 
1249 #define power_usart1_enable() (PRR0 &= (uint8_t)~(1 << PRUSART1))
1250 #define power_usart1_disable() (PRR0 |= (uint8_t)(1 << PRUSART1))
1251 
1252 #define power_all_enable() \
1253 do{ \
1254  PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)|(1<<PRUSART1)); \
1255  PRR1 &= (uint8_t)~(1<<PRTIM3); \
1256 }while(0)
1257 
1258 #define power_all_disable() \
1259 do{ \
1260  PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)|(1<<PRUSART1)); \
1261  PRR1 |= (uint8_t)(1<<PRTIM3); \
1262 }while(0)
1263 
1264 
1265 #elif defined(__AVR_ATmega32HVB__) \
1266 || defined(__AVR_ATmega32HVBREVB__) \
1267 || defined(__AVR_ATmega16HVB__) \
1268 || defined(__AVR_ATmega16HVBREVB__)
1269 
1270 
1271 #define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
1272 #define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
1273 
1274 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
1275 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
1276 
1277 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
1278 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
1279 
1280 /* Voltage ADC */
1281 #define power_vadc_enable() (PRR0 &= (uint8_t)~(1 << PRVADC))
1282 #define power_vadc_disable() (PRR0 |= (uint8_t)(1 << PRVADC))
1283 
1284 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
1285 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
1286 
1287 #define power_vrm_enable() (PRR0 &= (uint8_t)~(1 << PRVRM))
1288 #define power_vrm_disable() (PRR0 |= (uint8_t)(1 << PRVRM))
1289 
1290 #define power_all_enable() (PRR0 &= (uint8_t)~((1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRVADC)|(1<<PRSPI)|(1<<PRVRM)))
1291 #define power_all_disable() (PRR0 |= (uint8_t)((1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRVADC)|(1<<PRSPI)|(1<<PRVRM)))
1292 
1293 
1294 #elif defined(__AVR_ATmega16M1__) \
1295 || defined(__AVR_ATmega32C1__) \
1296 || defined(__AVR_ATmega32M1__) \
1297 || defined(__AVR_ATmega64C1__) \
1298 || defined(__AVR_ATmega64M1__)
1299 
1300 #define power_adc_enable() (PRR &= (uint8_t)~(1 << PRADC))
1301 #define power_adc_disable() (PRR |= (uint8_t)(1 << PRADC))
1302 
1303 #define power_lin_enable() (PRR &= (uint8_t)~(1 << PRLIN))
1304 #define power_lin_disable() (PRR |= (uint8_t)(1 << PRLIN))
1305 
1306 #define power_spi_enable() (PRR &= (uint8_t)~(1 << PRSPI))
1307 #define power_spi_disable() (PRR |= (uint8_t)(1 << PRSPI))
1308 
1309 #define power_timer0_enable() (PRR &= (uint8_t)~(1 << PRTIM0))
1310 #define power_timer0_disable() (PRR |= (uint8_t)(1 << PRTIM0))
1311 
1312 #define power_timer1_enable() (PRR &= (uint8_t)~(1 << PRTIM1))
1313 #define power_timer1_disable() (PRR |= (uint8_t)(1 << PRTIM1))
1314 
1315 #define power_psc_enable() (PRR &= (uint8_t)~(1 << PRPSC))
1316 #define power_psc_disable() (PRR |= (uint8_t)(1 << PRPSC))
1317 
1318 #define power_can_enable() (PRR &= (uint8_t)~(1 << PRCAN))
1319 #define power_can_disable() (PRR |= (uint8_t)(1 << PRCAN))
1320 
1321 #define power_all_enable() (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRLIN)|(1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRPSC)|(1<<PRCAN)))
1322 #define power_all_disable() (PRR |= (uint8_t)((1<<PRADC)|(1<<PRLIN)|(1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRPSC)|(1<<PRCAN)))
1323 
1324 
1325 #elif defined(__AVR_ATtiny167__) \
1326 || defined(__AVR_ATtiny87__)
1327 
1328 
1329 #define power_adc_enable() (PRR &= (uint8_t)~(1 << PRADC))
1330 #define power_adc_disable() (PRR |= (uint8_t)(1 << PRADC))
1331 
1332 #define power_usi_enable() (PRR &= (uint8_t)~(1 << PRUSI))
1333 #define power_usi_disable() (PRR |= (uint8_t)(1 << PRUSI))
1334 
1335 #define power_timer0_enable() (PRR &= (uint8_t)~(1 << PRTIM0))
1336 #define power_timer0_disable() (PRR |= (uint8_t)(1 << PRTIM0))
1337 
1338 #define power_timer1_enable() (PRR &= (uint8_t)~(1 << PRTIM1))
1339 #define power_timer1_disable() (PRR |= (uint8_t)(1 << PRTIM1))
1340 
1341 #define power_spi_enable() (PRR &= (uint8_t)~(1 << PRSPI))
1342 #define power_spi_disable() (PRR |= (uint8_t)(1 << PRSPI))
1343 
1344 #define power_lin_enable() (PRR &= (uint8_t)~(1 << PRLIN))
1345 #define power_lin_disable() (PRR |= (uint8_t)(1 << PRLIN))
1346 
1347 #define power_all_enable() (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRUSI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRSPI)|(1<<PRLIN)))
1348 #define power_all_disable() (PRR |= (uint8_t)((1<<PRADC)|(1<<PRUSI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRSPI)|(1<<PRLIN)))
1349 
1350 
1351 #elif defined(__AVR_AT90USB82__) \
1352 || defined(__AVR_AT90USB162__) \
1353 || defined(__AVR_ATmega8U2__) \
1354 || defined(__AVR_ATmega16U2__) \
1355 || defined(__AVR_ATmega32U2__)
1356 
1357 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
1358 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
1359 
1360 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
1361 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
1362 
1363 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
1364 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
1365 
1366 #define power_usb_enable() (PRR1 &= (uint8_t)~(1 << PRUSB))
1367 #define power_usb_disable() (PRR1 |= (uint8_t)(1 << PRUSB))
1368 
1369 #define power_usart1_enable() (PRR1 &= (uint8_t)~(1 << PRUSART1))
1370 #define power_usart1_disable() (PRR1 |= (uint8_t)(1 << PRUSART1))
1371 
1372 #define power_all_enable() \
1373 do{ \
1374  PRR0 &= (uint8_t)~((1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)); \
1375  PRR1 &= (uint8_t)~((1<<PRUSB)|(1<<PRUSART1)); \
1376 }while(0)
1377 
1378 #define power_all_disable() \
1379 do{ \
1380  PRR0 |= (uint8_t)((1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)); \
1381  PRR1 |= (uint8_t)((1<<PRUSB)|(1<<PRUSART1)); \
1382 }while(0)
1383 
1384 
1385 #elif defined(__AVR_AT90SCR100__)
1386 
1387 #define power_usart0_enable() (PRR0 &= (uint8_t)~(1 << PRUSART0))
1388 #define power_usart0_disable() (PRR0 |= (uint8_t)(1 << PRUSART0))
1389 
1390 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
1391 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
1392 
1393 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
1394 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
1395 
1396 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
1397 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
1398 
1399 #define power_timer2_enable() (PRR0 &= (uint8_t)~(1 << PRTIM2))
1400 #define power_timer2_disable() (PRR0 |= (uint8_t)(1 << PRTIM2))
1401 
1402 #define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
1403 #define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
1404 
1405 #define power_usbh_enable() (PRR1 &= (uint8_t)~(1 << PRUSBH))
1406 #define power_usbh_disable() (PRR1 |= (uint8_t)(1 << PRUSBH))
1407 
1408 #define power_usb_enable() (PRR1 &= (uint8_t)~(1 << PRUSB))
1409 #define power_usb_disable() (PRR1 |= (uint8_t)(1 << PRUSB))
1410 
1411 #define power_hsspi_enable() (PRR1 &= (uint8_t)~(1 << PRHSSPI))
1412 #define power_hsspi_disable() (PRR1 |= (uint8_t)(1 << PRHSSPI))
1413 
1414 #define power_sci_enable() (PRR1 &= (uint8_t)~(1 << PRSCI))
1415 #define power_sci_disable() (PRR1 |= (uint8_t)(1 << PRSCI))
1416 
1417 #define power_aes_enable() (PRR1 &= (uint8_t)~(1 << PRAES))
1418 #define power_aes_disable() (PRR1 |= (uint8_t)(1 << PRAES))
1419 
1420 #define power_kb_enable() (PRR1 &= (uint8_t)~(1 << PRKB))
1421 #define power_kb_disable() (PRR1 |= (uint8_t)(1 << PRKB))
1422 
1423 #define power_all_enable() \
1424 do{ \
1425  PRR0 &= (uint8_t)~((1<<PRUSART0)|(1<<PRSPI)|(1<<PRTIM1)|(1<<PRTIM0)|(1<<PRTIM2)|(1<<PRTWI)); \
1426  PRR1 &= (uint8_t)~((1<<PRUSBH)|(1<<PRUSB)|(1<<PRHSSPI)|(1<<PRSCI)|(1<<PRAES)|(1<<PRKB)); \
1427 }while(0)
1428 
1429 #define power_all_disable() \
1430 do{ \
1431  PRR0 |= (uint8_t)((1<<PRUSART0)|(1<<PRSPI)|(1<<PRTIM1)|(1<<PRTIM0)|(1<<PRTIM2)|(1<<PRTWI)); \
1432  PRR1 |= (uint8_t)((1<<PRUSBH)|(1<<PRUSB)|(1<<PRHSSPI)|(1<<PRSCI)|(1<<PRAES)|(1<<PRKB)); \
1433 }while(0)
1434 
1435 
1436 #elif defined(__AVR_ATtiny4__) \
1437 || defined(__AVR_ATtiny5__) \
1438 || defined(__AVR_ATtiny9__) \
1439 || defined(__AVR_ATtiny10__) \
1440 || defined(__AVR_ATtiny13A__) \
1441 
1442 #define power_adc_enable() (PRR &= (uint8_t)~(1 << PRADC))
1443 #define power_adc_disable() (PRR |= (uint8_t)(1 << PRADC))
1444 
1445 #define power_timer0_enable() (PRR &= (uint8_t)~(1 << PRTIM0))
1446 #define power_timer0_disable() (PRR |= (uint8_t)(1 << PRTIM0))
1447 
1448 #define power_all_enable() (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRTIM0)))
1449 #define power_all_disable() (PRR |= (uint8_t)((1<<PRADC)|(1<<PRTIM0)))
1450 
1451 
1452 #elif defined(__AVR_ATtiny20__) \
1453 || defined(__AVR_ATtiny40__)
1454 
1455 #define power_adc_enable() (PRR &= (uint8_t)~(1 << PRADC))
1456 #define power_adc_disable() (PRR |= (uint8_t)(1 << PRADC))
1457 
1458 #define power_timer0_enable() (PRR &= (uint8_t)~(1 << PRTIM0))
1459 #define power_timer0_disable() (PRR |= (uint8_t)(1 << PRTIM0))
1460 
1461 #define power_timer1_enable() (PRR &= (uint8_t)~(1 << PRTIM1))
1462 #define power_timer1_disable() (PRR |= (uint8_t)(1 << PRTIM1))
1463 
1464 #define power_spi_enable() (PRR &= (uint8_t)~(1 << PRSPI))
1465 #define power_spi_disable() (PRR |= (uint8_t)(1 << PRSPI))
1466 
1467 #define power_twi_enable() (PRR &= (uint8_t)~(1 << PRTWI))
1468 #define power_twi_disable() (PRR |= (uint8_t)(1 << PRTWI))
1469 
1470 #define power_all_enable() (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRSPI)|(1<<PRTWI)))
1471 #define power_all_disable() (PRR |= (uint8_t)((1<<PRADC)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRSPI)|(1<<PRTWI)))
1472 
1473 #endif
1474 
1475 
1476 #if defined(__AVR_AT90CAN32__) \
1477 || defined(__AVR_AT90CAN64__) \
1478 || defined(__AVR_AT90CAN128__) \
1479 || defined(__AVR_AT90PWM1__) \
1480 || defined(__AVR_AT90PWM2__) \
1481 || defined(__AVR_AT90PWM2B__) \
1482 || defined(__AVR_AT90PWM3__) \
1483 || defined(__AVR_AT90PWM3B__) \
1484 || defined(__AVR_AT90PWM216__) \
1485 || defined(__AVR_AT90PWM316__) \
1486 || defined(__AVR_AT90SCR100__) \
1487 || defined(__AVR_AT90USB646__) \
1488 || defined(__AVR_AT90USB647__) \
1489 || defined(__AVR_AT90USB82__) \
1490 || defined(__AVR_AT90USB1286__) \
1491 || defined(__AVR_AT90USB1287__) \
1492 || defined(__AVR_AT90USB162__) \
1493 || defined(__AVR_ATmega1280__) \
1494 || defined(__AVR_ATmega1281__) \
1495 || defined(__AVR_ATmega128RFA1__) \
1496 || defined(__AVR_ATmega1284RFR2__) \
1497 || defined(__AVR_ATmega128RFR2__) \
1498 || defined(__AVR_ATmega1284P__) \
1499 || defined(__AVR_ATmega162__) \
1500 || defined(__AVR_ATmega164A__) \
1501 || defined(__AVR_ATmega164P__) \
1502 || defined(__AVR_ATmega165__) \
1503 || defined(__AVR_ATmega165A__) \
1504 || defined(__AVR_ATmega165P__) \
1505 || defined(__AVR_ATmega168__) \
1506 || defined(__AVR_ATmega168P__) \
1507 || defined(__AVR_ATmega169__) \
1508 || defined(__AVR_ATmega169A__) \
1509 || defined(__AVR_ATmega169P__) \
1510 || defined(__AVR_ATmega169PA__) \
1511 || defined(__AVR_ATmega16U4__) \
1512 || defined(__AVR_ATmega2560__) \
1513 || defined(__AVR_ATmega2561__) \
1514 || defined(__AVR_ATmega2564RFR2__) \
1515 || defined(__AVR_ATmega256RFR2__) \
1516 || defined(__AVR_ATmega324A__) \
1517 || defined(__AVR_ATmega324P__) \
1518 || defined(__AVR_ATmega325__) \
1519 || defined(__AVR_ATmega325A__) \
1520 || defined(__AVR_ATmega3250__) \
1521 || defined(__AVR_ATmega3250A__) \
1522 || defined(__AVR_ATmega328__) \
1523 || defined(__AVR_ATmega328P__) \
1524 || defined(__AVR_ATmega329__) \
1525 || defined(__AVR_ATmega329A__) \
1526 || defined(__AVR_ATmega329P__) \
1527 || defined(__AVR_ATmega329PA__) \
1528 || defined(__AVR_ATmega3290__) \
1529 || defined(__AVR_ATmega3290A__) \
1530 || defined(__AVR_ATmega32C1__) \
1531 || defined(__AVR_ATmega32HVB__) \
1532 || defined(__AVR_ATmega32HVBREVB__) \
1533 || defined(__AVR_ATmega16HVB__) \
1534 || defined(__AVR_ATmega16HVBREVB__) \
1535 || defined(__AVR_ATmega32M1__) \
1536 || defined(__AVR_ATmega32U2__) \
1537 || defined(__AVR_ATmega32U4__) \
1538 || defined(__AVR_ATmega32U6__) \
1539 || defined(__AVR_ATmega48__) \
1540 || defined(__AVR_ATmega48P__) \
1541 || defined(__AVR_ATmega640__) \
1542 || defined(__AVR_ATmega649P__) \
1543 || defined(__AVR_ATmega644__) \
1544 || defined(__AVR_ATmega644A__) \
1545 || defined(__AVR_ATmega644P__) \
1546 || defined(__AVR_ATmega644PA__) \
1547 || defined(__AVR_ATmega645__) \
1548 || defined(__AVR_ATmega645A__) \
1549 || defined(__AVR_ATmega645P__) \
1550 || defined(__AVR_ATmega6450__) \
1551 || defined(__AVR_ATmega6450A__) \
1552 || defined(__AVR_ATmega6450P__) \
1553 || defined(__AVR_ATmega649__) \
1554 || defined(__AVR_ATmega649A__) \
1555 || defined(__AVR_ATmega6490__) \
1556 || defined(__AVR_ATmega6490A__) \
1557 || defined(__AVR_ATmega6490P__) \
1558 || defined(__AVR_ATmega644RFR2__) \
1559 || defined(__AVR_ATmega64RFR2__) \
1560 || defined(__AVR_ATmega88__) \
1561 || defined(__AVR_ATmega88P__) \
1562 || defined(__AVR_ATmega8U2__) \
1563 || defined(__AVR_ATmega16U2__) \
1564 || defined(__AVR_ATmega32U2__) \
1565 || defined(__AVR_ATtiny48__) \
1566 || defined(__AVR_ATtiny167__) \
1567 || defined(__DOXYGEN__)
1568 
1569 
1570 /** \addtogroup avr_power
1571 
1572 Some of the newer AVRs contain a System Clock Prescale Register (CLKPR) that
1573 allows you to decrease the system clock frequency and the power consumption
1574 when the need for processing power is low. Below are two macros and an
1575 enumerated type that can be used to interface to the Clock Prescale Register.
1576 
1577 \note Not all AVR devices have a Clock Prescale Register. On those devices
1578 without a Clock Prescale Register, these macros are not available.
1579 */
1580 
1581 
1582 /** \addtogroup avr_power
1583 \code
1584 typedef enum
1585 {
1586  clock_div_1 = 0,
1587  clock_div_2 = 1,
1588  clock_div_4 = 2,
1589  clock_div_8 = 3,
1590  clock_div_16 = 4,
1591  clock_div_32 = 5,
1592  clock_div_64 = 6,
1593  clock_div_128 = 7,
1594  clock_div_256 = 8,
1595  clock_div_1_rc = 15, // ATmega128RFA1 only
1596 } clock_div_t;
1597 \endcode
1598 Clock prescaler setting enumerations.
1599 
1600 */
1601 typedef enum
1602 {
1603  clock_div_1 = 0,
1604  clock_div_2 = 1,
1605  clock_div_4 = 2,
1606  clock_div_8 = 3,
1607  clock_div_16 = 4,
1608  clock_div_32 = 5,
1609  clock_div_64 = 6,
1610  clock_div_128 = 7,
1611  clock_div_256 = 8
1612 #if defined(__AVR_ATmega128RFA1__) \
1613 || defined(__AVR_ATmega2564RFR2__) \
1614 || defined(__AVR_ATmega1284RFR2__) \
1615 || defined(__AVR_ATmega644RFR2__) \
1616 || defined(__AVR_ATmega256RFR2__) \
1617 || defined(__AVR_ATmega128RFR2__) \
1618 || defined(__AVR_ATmega64RFR2__) \
1619  , clock_div_1_rc = 15
1620 #endif
1621 } clock_div_t;
1622 
1623 
1624 static __inline__ void clock_prescale_set(clock_div_t) __attribute__((__always_inline__));
1625 
1626 /** \addtogroup avr_power
1627 \code clock_prescale_set(x) \endcode
1628 
1629 Set the clock prescaler register select bits, selecting a system clock
1630 division setting. This function is inlined, even if compiler
1631 optimizations are disabled.
1632 
1633 The type of x is clock_div_t.
1634 */
1635 void clock_prescale_set(clock_div_t __x)
1636 {
1637  uint8_t __tmp = _BV(CLKPCE);
1638  __asm__ __volatile__ (
1639  "in __tmp_reg__,__SREG__" "\n\t"
1640  "cli" "\n\t"
1641  "sts %1, %0" "\n\t"
1642  "sts %1, %2" "\n\t"
1643  "out __SREG__, __tmp_reg__"
1644  : /* no outputs */
1645  : "d" (__tmp),
1646  "M" (_SFR_MEM_ADDR(CLKPR)),
1647  "d" (__x)
1648  : "r0");
1649 }
1650 
1651 /** \addtogroup avr_power
1652 \code clock_prescale_get() \endcode
1653 Gets and returns the clock prescaler register setting. The return type is clock_div_t.
1654 
1655 */
1656 #define clock_prescale_get() (clock_div_t)(CLKPR & (uint8_t)((1<<CLKPS0)|(1<<CLKPS1)|(1<<CLKPS2)|(1<<CLKPS3)))
1657 
1658 
1659 #elif defined(__AVR_ATtiny24__) \
1660 || defined(__AVR_ATtiny24A__) \
1661 || defined(__AVR_ATtiny44__) \
1662 || defined(__AVR_ATtiny44A__) \
1663 || defined(__AVR_ATtiny84__) \
1664 || defined(__AVR_ATtiny84A__) \
1665 || defined(__AVR_ATtiny25__) \
1666 || defined(__AVR_ATtiny45__) \
1667 || defined(__AVR_ATtiny85__) \
1668 || defined(__AVR_ATtiny261A__) \
1669 || defined(__AVR_ATtiny261__) \
1670 || defined(__AVR_ATtiny461__) \
1671 || defined(__AVR_ATtiny461A__) \
1672 || defined(__AVR_ATtiny861__) \
1673 || defined(__AVR_ATtiny861A__) \
1674 || defined(__AVR_ATtiny2313__) \
1675 || defined(__AVR_ATtiny2313A__) \
1676 || defined(__AVR_ATtiny4313__) \
1677 || defined(__AVR_ATtiny13__) \
1678 || defined(__AVR_ATtiny13A__) \
1679 || defined(__AVR_ATtiny43U__) \
1680 
1681 typedef enum
1682 {
1683  clock_div_1 = 0,
1684  clock_div_2 = 1,
1685  clock_div_4 = 2,
1686  clock_div_8 = 3,
1687  clock_div_16 = 4,
1688  clock_div_32 = 5,
1689  clock_div_64 = 6,
1690  clock_div_128 = 7,
1691  clock_div_256 = 8
1692 } clock_div_t;
1693 
1694 static __inline__ void clock_prescale_set(clock_div_t) __attribute__((__always_inline__));
1695 
1696 void clock_prescale_set(clock_div_t __x)
1697 {
1698  uint8_t __tmp = _BV(CLKPCE);
1699  __asm__ __volatile__ (
1700  "in __tmp_reg__,__SREG__" "\n\t"
1701  "cli" "\n\t"
1702  "out %1, %0" "\n\t"
1703  "out %1, %2" "\n\t"
1704  "out __SREG__, __tmp_reg__"
1705  : /* no outputs */
1706  : "d" (__tmp),
1707  "I" (_SFR_IO_ADDR(CLKPR)),
1708  "d" (__x)
1709  : "r0");
1710 }
1711 
1712 
1713 #define clock_prescale_get() (clock_div_t)(CLKPR & (uint8_t)((1<<CLKPS0)|(1<<CLKPS1)|(1<<CLKPS2)|(1<<CLKPS3)))
1714 
1715 
1716 #endif
1717 
1718 
1719 
1720 
1721 #endif /* _AVR_POWER_H_ */

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